Data Center
articles
OCP 2025: Arm’s Chiplet Play Aims To Democratize AI Compute
Arm’s OCP board seat and new FCSA spec push chiplet interoperability from idea to implementation—enabling mix-and-match silicon and smarter storage so teams can build AI without hyperscaler budgets.
Inside SC25: AI Factories From Racks to Qubits
From WEKA’s memory grid and exabyte storage to 800G fabrics, liquid-cooled AI factories, edge clusters, and emerging quantum accelerators, SC25 proved HPC is now about end-to-end AI infrastructure.
Achieving HPC Performance with Xeon 6 Processors
Xeon 6 marries P-cores, E-cores, and scalable memory to feed data-hungry HPC workloads, eliminating bandwidth bottlenecks so spectral sims and other memory-bound codes can finally scale.
KubeCon Atlanta: CNCF Sets AI Standard for Kubernetes
On Day 1 of KubeCon + CloudNativeCon Atlanta, CNCF unveiled Kubernetes AI Conformance to make workloads portable—arriving as inference surges to ~1.33 quadrillion tokens/month across Google’s systems.
VAST and CoreWeave Sign $1.17B Deal to Power AI Data Layer
Multi-year agreement makes VAST AI OS CoreWeave’s primary data foundation, aligning roadmaps for instant dataset access and performance across training and real-time inference in global AI cloud regions.
Avayla and OCP Redefine Cooling Standards for the AI Age
At the OCP Global Summit, Avayla CEO Kelley Mullick reveals how rapid standardization and hybrid cooling strategies are reshaping infrastructure for the AI era.
OCP 2025: Arm’s Chiplet Play Aims To Democratize AI Compute
Arm’s OCP board seat and new FCSA spec push chiplet interoperability from idea to implementation—enabling mix-and-match silicon and smarter storage so teams can build AI without hyperscaler budgets.
Inside SC25: AI Factories From Racks to Qubits
From WEKA’s memory grid and exabyte storage to 800G fabrics, liquid-cooled AI factories, edge clusters, and emerging quantum accelerators, SC25 proved HPC is now about end-to-end AI infrastructure.
Achieving HPC Performance with Xeon 6 Processors
Xeon 6 marries P-cores, E-cores, and scalable memory to feed data-hungry HPC workloads, eliminating bandwidth bottlenecks so spectral sims and other memory-bound codes can finally scale.
KubeCon Atlanta: CNCF Sets AI Standard for Kubernetes
On Day 1 of KubeCon + CloudNativeCon Atlanta, CNCF unveiled Kubernetes AI Conformance to make workloads portable—arriving as inference surges to ~1.33 quadrillion tokens/month across Google’s systems.
VAST and CoreWeave Sign $1.17B Deal to Power AI Data Layer
Multi-year agreement makes VAST AI OS CoreWeave’s primary data foundation, aligning roadmaps for instant dataset access and performance across training and real-time inference in global AI cloud regions.
Avayla and OCP Redefine Cooling Standards for the AI Age
At the OCP Global Summit, Avayla CEO Kelley Mullick reveals how rapid standardization and hybrid cooling strategies are reshaping infrastructure for the AI era.
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Podcasts
PEAK:AIO on Smarter Storage for AI—Data Insights @ OCP
From OCP San Jose, PEAK:AIO’s Roger Cummings explains how workload-aware file systems, richer memory tiers, and capturing intelligence at the edge reduce cost and complexity.
CelLink PowerPlane: Flat Power for AI Server Racks
Innovative power delivery unlocks a shift in data-center design. CelLink PowerPlane routes thousands of amps in a flat, flexible circuit—cutting cabling and accelerating AI factory builds.
Hybrid Quantum + HPC: CESQ’s Lesya Dymyd at OCP 2025
Recorded live at OCP in San Jose, Allyson Klein talks with CESQ’s Lesya Dymyd about hybrid quantum-classical computing, the new Maison du Quantique, and how real-world use cases may emerge over the next 5–7 years.
Ventiva Brings Innovative Solid-State Cooling to the AI Data Center
CEO Carl Schlachte joins TechArena at OCP Summit to share how Ventiva’s solid-state cooling—proven in dense laptops—scales to servers, cutting noise, complexity and power while speeding deployment.
OCP, Power Grids & Open Racks — with Dr. Andrew Chien
From OCP Summit San Jose, Allyson Klein and co-host Jeniece Wnorowski interview Dr. Andrew Chien (UChicago & Argonne) on grid interconnects, rack-scale standards, and how openness speeds innovation.
Flex at OCP: Chris Butler on Breaking the IT–Power Wall
From the OCP Global Summit in San Jose, Allyson Klein sits down with Chris Butler of Flex to unpack how the company is collapsing the gap between IT and power—literally and figuratively.
An Open Computing Landscape with OpenUK’s Amanda Brock
TechArena host Allyson Klein chats with OpenUK CEO Amanda Brock live from the OCP Regional Summit in Prague on her organization’s mission to drive open software, hardware and data contributions for UK developers.
The In-Memory Future of Applications with Oracle
TechArena host Allyson Klein chats with Oracle VP Shasank Chavan about in-memory databases, customer demands in a data centric world, and how infrastructure must change to fuel customer needs.
The Future of Semi Innovation from Disruptive Memory to Chiplets with Alphawave Semi
TechArena host Allyson Klein chats with Alphawave Semi’s Letizia Guiliano about the future of semiconductor innovation across memory, optical and interoperable chiplet solutions and how her company is poised to deliver leadership innovation rooted in standards.
CXL Enabled Memory Innovation with Memverge
TechArena host Allyson Klein chats with Memverge founder and CEO Charles Fan about his company’s disruptive vision for breaking through data center memory limitations and what the CXL standard will bring to infrastructure innovation.
Breakthrough Data Center Platform Innovation with AMD
TechArena host Allyson Klein chats with AMD senior fellow and CXL technical taskforce co-chair Mahesh Wagh regarding AMD’s entry of CXL platforms into the market gen 4 AMD EYPC processors and his organization’s strategy to deliver disruptive innovation utilizing CXL capability in the years ahead.
UCIe Unleashing Chiplet Innovation with NVIDIA
TechArena host Allyson Klein chats with NVIDIA Data Center Product Architect and Universal Chiplet Interconnect Express organization board member Durgesh Srivastava about the new UCIe specification and how it will reshape the foundations of compute architectures.
