Synopsys, Intel Foundry Team Up to Spur Angstrom-Scale Innovation
APRIL 29, 2025: At Intel Foundry Direct Connect 2025 today in San Jose, Synopsys announced a major expansion of its collaboration with Intel Foundry, fueling a new era of high-performance chip design with certified, production-ready EDA flows, expanded IP portfolios, and next-gen packaging innovation.
When it comes to the future of silicon, Synopsys is pushing full throttle into the angstrom era. Building on a multi-year partnership with Intel Foundry, Synopsys unveiled several key initiatives to fast-track advanced node designs, from silicon to system, across Intel’s most cutting-edge process technologies — including Intel 18A and the new Intel 18A-P with its groundbreaking RibbonFET and PowerVia innovations.
Here are the high points:
1) Certified digital and analog EDA flows for Intel 18A are now ready for Intel customers, supporting faster, more efficient design starts.
2) Production-ready EDA flows for Intel 18A-P — the evolution of 18A featuring gate-all-around transistors and backside power delivery — are now available, built through early collaboration between Synopsys and Intel, informed by unique early DTCO work on Intel 18A.
3) Advanced multi-die design enablement is also on deck. Synopsys has developed an optimized reference flow for Intel’s new EMIB-T packaging technology, powered by its 3DIC Compiler platform.
4) Expanded Synopsys IP support for Intel’s angstrom nodes, with solutions designed to maximize performance, power efficiency, and silicon lifecycle management.
Synopsys also announced they’ve joined the Intel Foundry Accelerator Design Services Alliance, and are a founding member of the new Intel Foundry Chiplet Alliance, further deepening their leadership role in the Intel Foundry ecosystem.
What Makes This News Stand Out
The industry has been anticipating Intel 18A as a critical moment — not just for Intel’s re-entry into foundry leadership, but for the broader enablement of truly differentiated HPC silicon. PowerVia and RibbonFET technologies are redefining what’s possible in PPA (Performance, Power, Area) optimization, but designing on these advanced nodes requires a complete rethinking of traditional EDA flows and IP development.
Synopsys has done more than adapt. They leaned into early co-optimization efforts with Intel, notably through unique Design Technology Co-Optimization (DTCO) on Intel 18A, fine-tuning every stage from exploration to signoff, and enabling early adopters to move faster with fewer design iterations. This close collaboration continues, with Synopsys now engaged in DTCO work for Intel 14A-E.
Multi-die design is also a critical theme. With chiplets rapidly becoming a dominant architecture for AI accelerators, network processors, and HPC systems, advanced packaging solutions like EMIB-T — and the design tools that support them — will be make-or-break for innovation. Synopsys' unified 3DIC Compiler platform allows for exploration, planning, and multiphysics signoff in a single environment, which helps teams manage the complexity of heterogeneous integration at scale.
And on the IP side, the breadth of Synopsys' offering for Intel 18A is impressive. High-speed interfaces like 224G Ethernet, PCIe 7.0, UCIe, and USB4, along with critical foundation IP, such as embedded memories, logic libraries, IOs, and PVT sensors, all optimized for PowerVia and the unique characteristics of RibbonFET designs.
The TechArena Take
At TechArena, we see Synopsys' expanded collaboration with Intel Foundry as a key accelerant for the next wave of semiconductor innovation — especially in AI and high-performance computing, where the race for leadership is not just about process nodes, but about full-system optimization.
By delivering certified flows for 18A, production-ready flows for 18A-P, robust IP portfolios, and deeply integrated multi-die design capabilities, Synopsys is helping to de-risk early adoption of Intel’s most advanced technologies. This could open the door for a broader range of customers to confidently tape out designs on Intel 18A and 18A-P — and could ultimately help accelerate ecosystem momentum for Intel Foundry’s ambitious growth plans.
In an era where silicon leadership increasingly means system leadership, Synopsys isn’t just following the roadmap. They’re helping draw it.
APRIL 29, 2025: At Intel Foundry Direct Connect 2025 today in San Jose, Synopsys announced a major expansion of its collaboration with Intel Foundry, fueling a new era of high-performance chip design with certified, production-ready EDA flows, expanded IP portfolios, and next-gen packaging innovation.
When it comes to the future of silicon, Synopsys is pushing full throttle into the angstrom era. Building on a multi-year partnership with Intel Foundry, Synopsys unveiled several key initiatives to fast-track advanced node designs, from silicon to system, across Intel’s most cutting-edge process technologies — including Intel 18A and the new Intel 18A-P with its groundbreaking RibbonFET and PowerVia innovations.
Here are the high points:
1) Certified digital and analog EDA flows for Intel 18A are now ready for Intel customers, supporting faster, more efficient design starts.
2) Production-ready EDA flows for Intel 18A-P — the evolution of 18A featuring gate-all-around transistors and backside power delivery — are now available, built through early collaboration between Synopsys and Intel, informed by unique early DTCO work on Intel 18A.
3) Advanced multi-die design enablement is also on deck. Synopsys has developed an optimized reference flow for Intel’s new EMIB-T packaging technology, powered by its 3DIC Compiler platform.
4) Expanded Synopsys IP support for Intel’s angstrom nodes, with solutions designed to maximize performance, power efficiency, and silicon lifecycle management.
Synopsys also announced they’ve joined the Intel Foundry Accelerator Design Services Alliance, and are a founding member of the new Intel Foundry Chiplet Alliance, further deepening their leadership role in the Intel Foundry ecosystem.
What Makes This News Stand Out
The industry has been anticipating Intel 18A as a critical moment — not just for Intel’s re-entry into foundry leadership, but for the broader enablement of truly differentiated HPC silicon. PowerVia and RibbonFET technologies are redefining what’s possible in PPA (Performance, Power, Area) optimization, but designing on these advanced nodes requires a complete rethinking of traditional EDA flows and IP development.
Synopsys has done more than adapt. They leaned into early co-optimization efforts with Intel, notably through unique Design Technology Co-Optimization (DTCO) on Intel 18A, fine-tuning every stage from exploration to signoff, and enabling early adopters to move faster with fewer design iterations. This close collaboration continues, with Synopsys now engaged in DTCO work for Intel 14A-E.
Multi-die design is also a critical theme. With chiplets rapidly becoming a dominant architecture for AI accelerators, network processors, and HPC systems, advanced packaging solutions like EMIB-T — and the design tools that support them — will be make-or-break for innovation. Synopsys' unified 3DIC Compiler platform allows for exploration, planning, and multiphysics signoff in a single environment, which helps teams manage the complexity of heterogeneous integration at scale.
And on the IP side, the breadth of Synopsys' offering for Intel 18A is impressive. High-speed interfaces like 224G Ethernet, PCIe 7.0, UCIe, and USB4, along with critical foundation IP, such as embedded memories, logic libraries, IOs, and PVT sensors, all optimized for PowerVia and the unique characteristics of RibbonFET designs.
The TechArena Take
At TechArena, we see Synopsys' expanded collaboration with Intel Foundry as a key accelerant for the next wave of semiconductor innovation — especially in AI and high-performance computing, where the race for leadership is not just about process nodes, but about full-system optimization.
By delivering certified flows for 18A, production-ready flows for 18A-P, robust IP portfolios, and deeply integrated multi-die design capabilities, Synopsys is helping to de-risk early adoption of Intel’s most advanced technologies. This could open the door for a broader range of customers to confidently tape out designs on Intel 18A and 18A-P — and could ultimately help accelerate ecosystem momentum for Intel Foundry’s ambitious growth plans.
In an era where silicon leadership increasingly means system leadership, Synopsys isn’t just following the roadmap. They’re helping draw it.
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